| Server IP : 216.250.13.251 / Your IP : 216.73.217.100 Web Server : nginx/1.24.0 System : Linux gunay 6.8.0-134-generic #134-Ubuntu SMP PREEMPT_DYNAMIC Fri Jun 26 18:43:11 UTC 2026 x86_64 User : root ( 0) PHP Version : 7.4.33 Disable Function : pcntl_alarm,pcntl_fork,pcntl_waitpid,pcntl_wait,pcntl_wifexited,pcntl_wifstopped,pcntl_wifsignaled,pcntl_wifcontinued,pcntl_wexitstatus,pcntl_wtermsig,pcntl_wstopsig,pcntl_signal,pcntl_signal_get_handler,pcntl_signal_dispatch,pcntl_get_last_error,pcntl_strerror,pcntl_sigprocmask,pcntl_sigwaitinfo,pcntl_sigtimedwait,pcntl_exec,pcntl_getpriority,pcntl_setpriority,pcntl_async_signals,pcntl_unshare, MySQL : OFF | cURL : ON | WGET : ON | Perl : ON | Python : OFF | Sudo : ON | Pkexec : OFF Directory : /lib/modules/6.8.0-138-generic/build/include/dt-bindings/clock/ |
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/* SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) */ /* * Copyright (c) 2021, The Linux Foundation. All rights reserved. */ #ifndef _DT_BINDINGS_CLK_QCOM_LPASS_AUDIO_CC_SC7280_H #define _DT_BINDINGS_CLK_QCOM_LPASS_AUDIO_CC_SC7280_H /* LPASS_AUDIO_CC clocks */ #define LPASS_AUDIO_CC_PLL 0 #define LPASS_AUDIO_CC_PLL_OUT_AUX2 1 #define LPASS_AUDIO_CC_PLL_OUT_AUX2_DIV_CLK_SRC 2 #define LPASS_AUDIO_CC_PLL_OUT_MAIN_DIV_CLK_SRC 3 #define LPASS_AUDIO_CC_CDIV_RX_MCLK_DIV_CLK_SRC 4 #define LPASS_AUDIO_CC_CODEC_MEM0_CLK 5 #define LPASS_AUDIO_CC_CODEC_MEM1_CLK 6 #define LPASS_AUDIO_CC_CODEC_MEM2_CLK 7 #define LPASS_AUDIO_CC_CODEC_MEM_CLK 8 #define LPASS_AUDIO_CC_EXT_MCLK0_CLK 9 #define LPASS_AUDIO_CC_EXT_MCLK0_CLK_SRC 10 #define LPASS_AUDIO_CC_EXT_MCLK1_CLK 11 #define LPASS_AUDIO_CC_EXT_MCLK1_CLK_SRC 12 #define LPASS_AUDIO_CC_RX_MCLK_2X_CLK 13 #define LPASS_AUDIO_CC_RX_MCLK_CLK 14 #define LPASS_AUDIO_CC_RX_MCLK_CLK_SRC 15 /* LPASS AUDIO CC CSR */ #define LPASS_AUDIO_SWR_RX_CGCR 0 #define LPASS_AUDIO_SWR_TX_CGCR 1 #define LPASS_AUDIO_SWR_WSA_CGCR 2 /* LPASS_AON_CC clocks */ #define LPASS_AON_CC_PLL 0 #define LPASS_AON_CC_PLL_OUT_EVEN 1 #define LPASS_AON_CC_PLL_OUT_MAIN_CDIV_DIV_CLK_SRC 2 #define LPASS_AON_CC_PLL_OUT_ODD 3 #define LPASS_AON_CC_AUDIO_HM_H_CLK 4 #define LPASS_AON_CC_CDIV_TX_MCLK_DIV_CLK_SRC 5 #define LPASS_AON_CC_MAIN_RCG_CLK_SRC 6 #define LPASS_AON_CC_TX_MCLK_2X_CLK 7 #define LPASS_AON_CC_TX_MCLK_CLK 8 #define LPASS_AON_CC_TX_MCLK_RCG_CLK_SRC 9 #define LPASS_AON_CC_VA_MEM0_CLK 10 /* LPASS_AON_CC power domains */ #define LPASS_AON_CC_LPASS_AUDIO_HM_GDSC 0 #endif